ISR
This commit is contained in:
56
bochsrc.bxrc
56
bochsrc.bxrc
@@ -1,56 +0,0 @@
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# configuration file generated by Bochs
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plugin_ctrl: unmapped=1, biosdev=1, speaker=1, extfpuirq=1, parallel=1, serial=1, gameport=1
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config_interface: win32config
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display_library: win32, options="gui_debug"
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memory: host=32, guest=32
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romimage: file="C:\Program Files (x86)\Bochs-2.6.9/BIOS-bochs-latest", address=0x0, options=none
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vgaromimage: file="C:\Program Files (x86)\Bochs-2.6.9/VGABIOS-lgpl-latest"
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boot: cdrom
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floppy_bootsig_check: disabled=0
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# no floppya
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# no floppyb
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ata0: enabled=1, ioaddr1=0x1f0, ioaddr2=0x3f0, irq=14
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ata0-master: type=cdrom, path="E:\OS\OwOS\build\OwOS.iso", status=inserted, model="Generic 1234", biosdetect=auto
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ata0-slave: type=none
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ata1: enabled=1, ioaddr1=0x170, ioaddr2=0x370, irq=15
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ata1-master: type=none
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ata1-slave: type=none
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ata2: enabled=0
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ata3: enabled=0
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optromimage1: file=none
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optromimage2: file=none
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optromimage3: file=none
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optromimage4: file=none
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optramimage1: file=none
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optramimage2: file=none
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optramimage3: file=none
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optramimage4: file=none
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pci: enabled=1, chipset=i440fx
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vga: extension=vbe, update_freq=5, realtime=1
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cpu: count=1, ips=4000000, model=bx_generic, reset_on_triple_fault=1, cpuid_limit_winnt=0, ignore_bad_msrs=1, mwait_is_nop=0
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cpuid: level=6, stepping=3, model=3, family=6, vendor_string="GenuineIntel", brand_string=" Intel(R) Pentium(R) 4 CPU "
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cpuid: mmx=1, apic=xapic, simd=sse2, sse4a=0, misaligned_sse=0, sep=1, movbe=0, adx=0
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cpuid: aes=0, sha=0, xsave=0, xsaveopt=0, x86_64=1, 1g_pages=0, pcid=0, fsgsbase=0
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cpuid: smep=0, smap=0, mwait=1, vmx=1
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print_timestamps: enabled=0
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port_e9_hack: enabled=0
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private_colormap: enabled=0
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clock: sync=none, time0=local, rtc_sync=0
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# no cmosimage
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# no loader
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log: -
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logprefix: %t%e%d
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debug: action=ignore
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info: action=report
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error: action=report
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panic: action=ask
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keyboard: type=mf, serial_delay=250, paste_delay=100000, user_shortcut=none
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mouse: type=ps2, enabled=0, toggle=ctrl+mbutton
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sound: waveoutdrv=win, waveout=none, waveindrv=win, wavein=none, midioutdrv=win, midiout=none
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speaker: enabled=1, mode=sound
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parport1: enabled=1, file=none
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parport2: enabled=0
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com1: enabled=1, mode=null
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com2: enabled=0
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com3: enabled=0
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com4: enabled=0
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BIN
build/OwOS.bin
BIN
build/OwOS.bin
Binary file not shown.
BIN
build/OwOS.iso
BIN
build/OwOS.iso
Binary file not shown.
Binary file not shown.
@@ -37,10 +37,10 @@ _start:
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jmp 1b
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jmp 1b
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.global INIT_FPU
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.global FPU_Init
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.type INIT_FPU, @function
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.type FPU_Init, @function
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INIT_FPU:
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FPU_Init:
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# FPU Config
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# FPU Config
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VAL_037F:
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VAL_037F:
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.hword 0x037F
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.hword 0x037F
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@@ -58,5 +58,6 @@ INIT_FPU:
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fldcw VAL_037E
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fldcw VAL_037E
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fldcw VAL_037A
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fldcw VAL_037A
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fninit
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fninit
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ret
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.size _start, . - _start
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.size _start, . - _start
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@@ -13,7 +13,7 @@
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#include <lib/kernel/logger/logger.h>
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#include <lib/kernel/logger/logger.h>
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extern "C" {
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extern "C" {
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extern void INIT_FPU(void);
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extern void FPU_Init(void);
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}
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}
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extern "C"
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extern "C"
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@@ -28,6 +28,9 @@ int kernel_main(uint32_t magic, MultibootInfo_t* multiboot) {
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// Init systems
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// Init systems
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FPU_Init();
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loggerOK("FPU Init");
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GDT_Init();
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GDT_Init();
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loggerOK("GDT Init");
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loggerOK("GDT Init");
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@@ -51,6 +54,8 @@ int kernel_main(uint32_t magic, MultibootInfo_t* multiboot) {
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SetFGColour(VGA_BRIGHT_MAGENTA);
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SetFGColour(VGA_BRIGHT_MAGENTA);
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Write("~#");
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Write("~#");
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asm("sti");
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// PanicKernel(0x00, "Self Triggered Panic", "kernel.cpp:48", "kernel_main(uint32_t magic, MultibootInfo_t* multiboot)");
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// PanicKernel(0x00, "Self Triggered Panic", "kernel.cpp:48", "kernel_main(uint32_t magic, MultibootInfo_t* multiboot)");
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for (;;)
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for (;;)
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@@ -31,9 +31,9 @@ void GDT_Init() {
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// Null segment
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// Null segment
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GDT_Set_Gate(0, 0, 0, 0, 0);
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GDT_Set_Gate(0, 0, 0, 0, 0);
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// Code Base 0 limit 32 Access EXEC + RW
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// Code Base 0 limit 32 Access EXEC + RW
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GDT_Set_Gate(1, 0x00000000, 0xFFFFFFFF, GDT_ACCESS_PRESENT | GDT_ACCESS_EXEC | GDT_ACCESS_RW, GDT_FLAG_GR_PAGE | GDT_FLAG_SZ_32B);
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GDT_Set_Gate(1, 0x00000000, 0xFFFFFFFF, GDT_ACCESS_PRESENT | GDT_ACCESS_EXEC | GDT_ACCESS_RW, GDT_FLAG_GR_PAGE | GDT_FLAG_SZ_32B);
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// Data Base 0 Limit 32 Access RW
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// Data Base 0 Limit 32 Access RW
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GDT_Set_Gate(2, 0x00000000, 0xFFFFFFFF, GDT_ACCESS_PRESENT | GDT_ACCESS_RW, GDT_FLAG_GR_PAGE | GDT_FLAG_SZ_32B);
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GDT_Set_Gate(2, 0x00000000, 0xFFFFFFFF, GDT_ACCESS_PRESENT | GDT_ACCESS_RW, GDT_FLAG_GR_PAGE | GDT_FLAG_SZ_32B);
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lgdt(_GDTptr);
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lgdt(_GDTptr);
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@@ -4,10 +4,10 @@
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#include <kernel/kernio.h>
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#include <kernel/kernio.h>
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struct Regs_t {
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struct Regs_t {
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unsigned int gs, fs, es, ds; /* pushed the segs last */
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unsigned int gs, fs, es, ds; /* pushed the segs last */
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unsigned int edi, esi, ebp, esp, ebx, edx, ecx, eax; /* pushed by 'pusha' */
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unsigned int edi, esi, ebp, esp, ebx, edx, ecx, eax; /* pushed by 'pusha' */
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unsigned int int_no, err_code; /* our 'push byte #' and ecodes do this */
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unsigned int int_no, err_code; /* our 'push byte #' and ecodes do this */
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unsigned int eip, cs, eflags, useresp, ss; /* pushed by the processor automatically */
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unsigned int eip, cs, eflags, useresp, ss; /* pushed by the processor automatically */
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};
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};
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char *PanicMessage[] = {
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char *PanicMessage[] = {
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@@ -48,7 +48,6 @@ char *PanicMessage[] = {
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extern "C" {
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extern "C" {
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void DEFAULT_ISR() {
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void DEFAULT_ISR() {
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Write("SMH \n");
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outb(0x20,0x20);
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outb(0x20,0x20);
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}
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}
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@@ -57,12 +56,13 @@ void KeyboardHandler() {
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outb(0x20,0x20);
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outb(0x20,0x20);
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}
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}
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void FaultHandler(struct Regs_t *r) {
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void FaultHandler(struct Regs_t* r) {
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uint32_t val;
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if (r->int_no < 32) {
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asm volatile ( "mov %%cr2, %0" : "=r"(val) );
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uint32_t val;
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PanicKernel(val, PanicMessage[r->int_no]);
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asm volatile ( "mov %%cr2, %0" : "=r"(val) );
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for (;;)
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PanicKernel(val, PanicMessage[r->int_no], "kernel/isr.cpp:64", "FaultHandler(struct Regs_t* r)");
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asm("hlt");
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for(;;) {}
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}
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}
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}
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}
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}
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@@ -7,6 +7,8 @@
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#include <kernel/drivers/terminal/terminal.h>
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#include <kernel/drivers/terminal/terminal.h>
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void PanicKernel(char code, char* why, char* where, char* what) {
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void PanicKernel(char code, char* why, char* where, char* what) {
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asm("cli");
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if (why == "") {
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if (why == "") {
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switch (code) {
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switch (code) {
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case 0x00:
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case 0x00:
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@@ -79,5 +81,7 @@ void PanicKernel(char code, char* why, char* where, char* what) {
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Write("Error Code: 0x");
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Write("Error Code: 0x");
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Write(itohx(code));
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Write(itohx(code));
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asm("cli"); // Clear interrupt bit / dissable interrupts
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for (;;) {
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asm("hlt");
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}
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}
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}
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@@ -4,23 +4,14 @@
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void PIC_Default_Remap() {
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void PIC_Default_Remap() {
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outb(0x20, 0x11);
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outb(0x20, 0x11);
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io_wait();
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outb(0xA0, 0x11);
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outb(0xA0, 0x11);
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io_wait();
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outb(0x21, 0x20);
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outb(0x21, 0x20);
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io_wait();
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outb(0xA1, 0x28);
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outb(0xA1, 0x28);
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io_wait();
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outb(0x21, 0x04);
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outb(0x21, 0x04);
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io_wait();
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outb(0xA1, 0x02);
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outb(0xA1, 0x02);
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io_wait();
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outb(0x21, 0x01);
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outb(0x21, 0x01);
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io_wait();
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outb(0xA1, 0x01);
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outb(0xA1, 0x01);
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io_wait();
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outb(0x21, 0x0);
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outb(0x21, 0x0);
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io_wait();
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outb(0xA1, 0x0);
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outb(0xA1, 0x0);
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}
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}
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