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fpga-basics/Max10_RT/PLL.ppf
Benjamin Kyd 279813aad7 that again
2022-06-06 21:20:05 +01:00

10 lines
338 B
XML

<?xml version="1.0" encoding="UTF-8" ?>
<!DOCTYPE pinplan>
<pinplan intended_family="MAX 10" variation_name="PLL" megafunction_name="ALTPLL" specifies="all_ports">
<global>
<pin name="inclk0" direction="input" scope="external" source="clock" />
<pin name="c0" direction="output" scope="external" source="clock" />
</global>
</pinplan>