fpga-basics/Verilator_Tests/spi/wave.vcd

$version Generated by VerilatedVcd $end
$timescale 1ps $end
 $scope module TOP $end
  $var wire 1 * clk_25mhz $end
  $var wire 1 + spi_clk $end
  $var wire 1 , spi_mosi $end
  $var wire 1 - spi_miso $end
  $var wire 1 . spi_cs $end
  $scope module top $end
   $var wire 1 * clk_25mhz $end
   $var wire 1 + spi_clk $end
   $var wire 1 , spi_mosi $end
   $var wire 1 - spi_miso $end
   $var wire 1 . spi_cs $end
   $var wire 8 # miso [7:0] $end
   $var wire 8 / mosi [7:0] $end
   $var wire 1 $ busy $end
   $var wire 1 % start $end
   $scope module spimaster0 $end
    $var wire 1 * clk $end
    $var wire 1 + spi_clk $end
    $var wire 1 % start $end
    $var wire 8 / data_out [7:0] $end
    $var wire 1 , spi_mosi $end
    $var wire 8 # data_in [7:0] $end
    $var wire 1 - spi_miso $end
    $var wire 1 $ busy $end
    $var wire 1 . spi_cs $end
    $var wire 4 & bit_cnt [3:0] $end
    $var wire 8 ' shift_reg_in [7:0] $end
    $var wire 8 ( shift_reg_out [7:0] $end
    $var wire 2 ) state [1:0] $end
   $upscope $end
  $upscope $end
 $upscope $end
$enddefinitions $end


#0
b00000000 #
0$
0%
b0000 &
b00000000 '
b00000000 (
b00 )
1*
0+
0,
0-
1.
b01101011 /
#20
0*
#40
1%
1*
#60
0*
#80
0%
b01101011 (
b01 )
1*
#100
0*
#120
1$
1%
b10 )
1*
0.
#140
0*
#160
0%
b11010110 (
1*
1+
#180
0*
#200
b0001 &
1*
0+
#220
0*
#240
b10101100 (
1*
1+
1,
#260
0*
#280
b0010 &
1*
0+
#300
0*
#320
b01011000 (
1*
1+
#340
0*
#360
b0011 &
1*
0+
#380
0*
#400
b10110000 (
1*
1+
0,
#420
0*
#440
b0100 &
1*
0+
#460
0*
#480
b01100000 (
1*
1+
1,
#500
0*
#520
b0101 &
1*
0+
#540
0*
#560
b11000000 (
1*
1+
0,
#580
0*
#600
b0110 &
1*
0+
#620
0*
#640
b10000000 (
1*
1+
1,
#660
0*
#680
b0111 &
1*
0+
#700
0*
#720
b00000000 (
1*
1+
#740
0*
#760
b1000 &
b11 )
1*
0+
#780
0*
#800
b00 )
1*
1.
#820
0*
#840
0$
1*
#860
0*
#880
1%
1*
#900
0*
#920
0%
b0000 &
b01101011 (
b01 )
1*
#940
0*
#960
1$
1%
b10 )
1*
0.
#980
0*
#1000
0%
b11010110 (
1*
1+
0,
#1020
0*
#1040
b0001 &
1*
0+
#1060
0*
#1080
b10101100 (
1*
1+
1,
#1100
0*
#1120
b0010 &
1*
0+
#1140
0*
#1160
b01011000 (
1*
1+
#1180
0*
#1200
b0011 &
1*
0+
#1220
0*
#1240
b10110000 (
1*
1+
0,
#1260
0*
#1280
b0100 &
1*
0+
#1300
0*
#1320
b01100000 (
1*
1+
1,
#1340
0*
#1360
b0101 &
1*
0+
#1380
0*
#1400
b11000000 (
1*
1+
0,
#1420
0*
#1440
b0110 &
1*
0+
#1460
0*
#1480
b10000000 (
1*
1+
1,
#1500
0*
#1520
b0111 &
1*
0+
#1540
0*
#1560
b00000000 (
1*
1+
#1580
0*
#1600
b1000 &
b11 )
1*
0+
#1620
0*
#1640
b00 )
1*
1.
#1660
0*
#1680
0$
1*
#1700
0*
#1720
1%
1*
#1740
0*
#1760
0%
b0000 &
b01101011 (
b01 )
1*
#1780
0*
#1800
1$
1%
b10 )
1*
0.
#1820
0*
#1840
0%
b11010110 (
1*
1+
0,
#1860
0*
#1880
b0001 &
1*
0+
#1900
0*
#1920
b10101100 (
1*
1+
1,
#1940
0*
#1960
b0010 &
1*
0+
#1980
0*
#2000
b01011000 (
1*
1+
#2020
0*
#2040
b0011 &
1*
0+
#2060
0*
#2080
b10110000 (
1*
1+
0,
#2100
0*
#2120
b0100 &
1*
0+
#2140
0*
#2160
b01100000 (
1*
1+
1,
#2180
0*
#2200
b0101 &
1*
0+
#2220
0*
#2240
b11000000 (
1*
1+
0,
#2260
0*
#2280
b0110 &
1*
0+
#2300
0*
#2320
b10000000 (
1*
1+
1,
#2340
0*
#2360
b0111 &
1*
0+
#2380
0*
#2400
b00000000 (
1*
1+
#2420
0*
#2440
b1000 &
b11 )
1*
0+
#2460
0*
#2480
b00 )
1*
1.
#2500
0*
#2520
0$
1*
#2540
0*
#2560
1%
1*
#2580
0*
#2600
0%
b0000 &
b01101011 (
b01 )
1*
#2620
0*
#2640
1$
1%
b10 )
1*
0.
#2660
0*
#2680
0%
b11010110 (
1*
1+
0,
#2700
0*
#2720
b0001 &
1*
0+
#2740
0*
#2760
b10101100 (
1*
1+
1,
#2780
0*
#2800
b0010 &
1*
0+
#2820
0*
#2840
b01011000 (
1*
1+
#2860
0*
#2880
b0011 &
1*
0+
#2900
0*
#2920
b10110000 (
1*
1+
0,
#2940
0*
#2960
b0100 &
1*
0+
#2980
0*
#3000
b01100000 (
1*
1+
1,
#3020
0*
#3040
b0101 &
1*
0+
#3060
0*
#3080
b11000000 (
1*
1+
0,
#3100
0*
#3120
b0110 &
1*
0+
#3140
0*
#3160
b10000000 (
1*
1+
1,
#3180
0*
#3200
b0111 &
1*
0+
#3220
0*
#3240
b00000000 (
1*
1+
#3260
0*
#3280
b1000 &
b11 )
1*
0+
#3300
0*
#3320
b00 )
1*
1.
#3340
0*
#3360
0$
1*
#3380
0*
#3400
1%
1*
#3420
0*
#3440
0%
b0000 &
b01101011 (
b01 )
1*
#3460
0*
#3480
1$
1%
b10 )
1*
0.
#3500
0*
#3520
0%
b11010110 (
1*
1+
0,
#3540
0*
#3560
b0001 &
1*
0+
#3580
0*
#3600
b10101100 (
1*
1+
1,
#3620
0*
#3640
b0010 &
1*
0+
#3660
0*
#3680
b01011000 (
1*
1+
#3700
0*
#3720
b0011 &
1*
0+
#3740
0*
#3760
b10110000 (
1*
1+
0,
#3780
0*
#3800
b0100 &
1*
0+
#3820
0*
#3840
b01100000 (
1*
1+
1,
#3860
0*
#3880
b0101 &
1*
0+
#3900
0*
#3920
b11000000 (
1*
1+
0,
#3940
0*
#3960
b0110 &
1*
0+
#3980
0*
#4000
b10000000 (
1*
1+
1,
#4020
0*
#4040
b0111 &
1*
0+
#4060
0*
#4080
b00000000 (
1*
1+
#4100
0*
#4120
b1000 &
b11 )
1*
0+
#4140
0*
#4160
b00 )
1*
1.
#4180
0*
#4200
0$
1*
#4220
0*
#4240
1%
1*
#4260
0*
#4280
0%
b0000 &
b01101011 (
b01 )
1*
#4300
0*
#4320
1$
1%
b10 )
1*
0.
#4340
0*
#4360
0%
b11010110 (
1*
1+
0,
#4380
0*
#4400
b0001 &
1*
0+
#4420
0*
#4440
b10101100 (
1*
1+
1,
#4460
0*
#4480
b0010 &
1*
0+
#4500
0*
#4520
b01011000 (
1*
1+
#4540
0*
#4560
b0011 &
1*
0+
#4580
0*
#4600
b10110000 (
1*
1+
0,
#4620
0*
#4640
b0100 &
1*
0+
#4660
0*
#4680
b01100000 (
1*
1+
1,
#4700
0*
#4720
b0101 &
1*
0+
#4740
0*
#4760
b11000000 (
1*
1+
0,
#4780
0*
#4800
b0110 &
1*
0+
#4820
0*
#4840
b10000000 (
1*
1+
1,
#4860
0*
#4880
b0111 &
1*
0+
#4900
0*
#4920
b00000000 (
1*
1+
#4940
0*
#4960
b1000 &
b11 )
1*
0+
#4980
0*
#4999