Files
fpga-basics/Max10_Raytracer/vga_test_screen.sv.bak
2022-06-06 21:05:35 +01:00

5 lines
105 B
Systemverilog

VGA_Test_Screen(
input wire [10:0] scan_pos_x,
input wire [10:0] scan_pos_y,
output wire [2:0] rgb,
);