From 1f03f4ce84bfa0bf015da4ff83c00ebb67ac4564 Mon Sep 17 00:00:00 2001
From: Benjamin Kyd <benjamin.kyd@intel.com>
Date: Thu, 25 May 2023 00:59:50 +0100
Subject: [PATCH] arbritrary read on the bus

---
 src/main.rs |  2 ++
 src/ram.rs  | 38 +++++++++++++++++++++++---------------
 src/rv32.rs | 25 +++++++++++++++----------
 3 files changed, 40 insertions(+), 25 deletions(-)

diff --git a/src/main.rs b/src/main.rs
index d798a0c..df8443c 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -55,6 +55,8 @@ impl VMRV32I {
         }
 
         println!("VM > Program loaded to 0x{:08x}", self.pc);
+
+        println!("VM > WORD at 0x80000000: 0x{:04x}", self.bus.memory.read::<rv32::Word>(0x80000000))
     }
 
     fn init_cpu(&mut self) {
diff --git a/src/ram.rs b/src/ram.rs
index fac70e5..cebd0f4 100644
--- a/src/ram.rs
+++ b/src/ram.rs
@@ -1,3 +1,4 @@
+use crate::bus;
 use crate::rv32;
 
 pub const DRAM_SIZE: u32 = 1 * 1024 * 1024 * 1024; // 1GB
@@ -13,19 +14,26 @@ impl RAM {
         self.0.len()
     }
 
-    //fn read<T>(&mut self, address: XLen as usize) -> T {
-    //let memory = &self.0;
-    //let shift: T;
-    //// Little endian!!!
-    //match T {
-    ////QuadWord:
-    ////DoubleWord:
-    //Word => shift = (memory[address] as T)
-    //| ((memory[address] as T) << 8)
-    //| ((memory[address] as T) << 16)
-    //| ((memory[address] as T) << 24)
-    ////HalfWord:
-    ////Byte:
-    //}
-    //}
+    pub fn read<T>(&mut self, address: rv32::XLen) -> T
+    where
+        T: std::ops::Shl<Output = T>
+            + std::ops::BitOr<Output = T>
+            + From<rv32::Byte>
+            + From<rv32::HalfWord>
+            + From<rv32::Word>
+            //+ From<rv32::DoubleWord>
+            + Default
+    {
+        let address: usize = (address - bus::DRAM_BASE) as usize;
+        let memory = &self.0;
+
+        (address..)
+            .take(core::mem::size_of::<T>())
+            .enumerate()
+            .fold(T::default(), |acc, (i, x)| acc | (memory[x] << (i * 8)).into())
+    }
+
+    pub fn write<T>(&mut self, address: rv32::XLen, data: T) {
+
+    }
 }
diff --git a/src/rv32.rs b/src/rv32.rs
index f723c0e..31de689 100644
--- a/src/rv32.rs
+++ b/src/rv32.rs
@@ -1,17 +1,22 @@
 pub const XLEN: usize = 32;
 pub type XLen = u32;
 
-// define words as byte fraction
-//const QUADWORD: usize = 16;
-//const DOUBLEWORD: usize = 8;
-//const WORD: usize = 4;
-//const HALFWORD: usize = 2;
-//const BYTE: usize = 1;
+enum Data {
+    QuadWord(u128),
+    DoubleWord(u64),
+    Word(u32),
+    HalfWord(u16),
+    Byte(u8),
+}
 
-pub type QuadWord = u128;
-pub type DoubleWord = u64;
+// define words as byte fraction
+//pub const QUADWORD: usize = 16;
+pub const DOUBLEWORD: usize = 8;
+pub const WORD: usize = 4;
+pub const HALFWORD: usize = 2;
+pub const BYTE: usize = 1;
+
+//pub type DoubleWord = u64;
 pub type Word = u32;
 pub type HalfWord = u16;
 pub type Byte = u8;
-
-