diff --git a/src/cpu/mod.rs b/src/cpu/mod.rs index d09bfdc..327650a 100644 --- a/src/cpu/mod.rs +++ b/src/cpu/mod.rs @@ -1,8 +1,8 @@ use std::{cell::RefCell, rc::Rc}; -use crate::bus::*; -use crate::ram; +use crate::system::bus::*; +use crate::system::ram; +use crate::system::rv32; use crate::inst; -use crate::rv32; // Register ABI Description Saver // x0 zero Zero Immutable diff --git a/src/ext/decode.rs b/src/ext/decode.rs new file mode 100644 index 0000000..7b262f7 --- /dev/null +++ b/src/ext/decode.rs @@ -0,0 +1,36 @@ +use crate::system::rv32; +use crate::cpu; + +macro_rules! match_mask { + ($int:expr, $($bit:expr)+) => { 'scope: { + let mut int = $int; + + $({ + let msb = int & (1 << 31); + let bit = $bit; + if (bit == 0 || bit == 1) && bit != msb.reverse_bits() { + break 'scope false; + } + int <<= 1; + })+ + + true + }}; +} + +trait Instruction { + fn get_mask() -> rv32::Word; + fn step(&self, inst: rv32::Word, state: &mut cpu::CPU); +} + +struct ADDI {} +impl Instruction for ADDI { + fn get_mask() -> rv32::Word { + } +} + +pub fn decode_inst(inst: rv32::WORD) -> fn() { + // loop over all bitmasks + // + +} diff --git a/src/ext/mod.rs b/src/ext/mod.rs index c730e33..5331d4b 100644 --- a/src/ext/mod.rs +++ b/src/ext/mod.rs @@ -1 +1,12 @@ -use crate:: +use crate::system::rv32; + +mod decode; + +// Instruction bitmasks +// This will be awkward as the instruction types +// are sometimes shared accross modules (float / double) +// Instruction parsing +// Extensibility + +type Instruction = rv32::Word; + diff --git a/src/inst.rs b/src/inst.rs index 22238b8..92de238 100644 --- a/src/inst.rs +++ b/src/inst.rs @@ -1,6 +1,6 @@ use modular_bitfield::prelude::*; -use crate::rv32; +use crate::system::rv32; pub const R_TYPE: u8 = 0b00110011; pub const I_TYPE: u8 = 0b00010011; diff --git a/src/main.rs b/src/main.rs index 55b2599..3c3df4a 100644 --- a/src/main.rs +++ b/src/main.rs @@ -3,13 +3,12 @@ use std::io::BufReader; use std::io::Read; use std::{cell::RefCell, rc::Rc}; -mod bus; mod cpu; +mod ext; +mod system; mod inst; -mod ram; -mod rv32; -use crate::bus::*; +use crate::system::bus; use crate::cpu::*; struct VMRV32I { @@ -19,7 +18,7 @@ struct VMRV32I { impl VMRV32I { fn new() -> VMRV32I { - let bus = Rc::new(RefCell::new(Bus::new())); + let bus = Rc::new(RefCell::new(bus::Bus::new())); let mut cpu = CPU::new(Rc::clone(&bus)); cpu.init(); VMRV32I { cpu, bus } diff --git a/src/bus.rs b/src/system/bus.rs similarity index 98% rename from src/bus.rs rename to src/system/bus.rs index 4cc8be6..198a058 100644 --- a/src/bus.rs +++ b/src/system/bus.rs @@ -1,7 +1,7 @@ pub const DRAM_BASE: u32 = 0x80000000; -use crate::rv32; -use crate::ram; +use crate::system::rv32; +use crate::system::ram; pub struct Bus { memory: ram::RAM, diff --git a/src/system/mod.rs b/src/system/mod.rs new file mode 100644 index 0000000..5695648 --- /dev/null +++ b/src/system/mod.rs @@ -0,0 +1,3 @@ +pub mod bus; +pub mod ram; +pub mod rv32; diff --git a/src/ram.rs b/src/system/ram.rs similarity index 97% rename from src/ram.rs rename to src/system/ram.rs index d9440af..da9b6c3 100644 --- a/src/ram.rs +++ b/src/system/ram.rs @@ -1,5 +1,5 @@ -use crate::bus; -use crate::rv32; +use crate::system::bus; +use crate::system::rv32; //pub const DRAM_SIZE: u32 = 1 * 1024 * 1024 * 1024; // 1GB //pub const DRAM_SIZE: u32 = 1 * 1024; // 1KB diff --git a/src/rv32.rs b/src/system/rv32.rs similarity index 100% rename from src/rv32.rs rename to src/system/rv32.rs