From 628339ee55203f6a6d002739b03f56532780ca88 Mon Sep 17 00:00:00 2001
From: Benjamin Kyd <benjamin.kyd@intel.com>
Date: Fri, 26 May 2023 00:03:27 +0100
Subject: [PATCH] fogor

---
 src/inst.rs | 7 +++++++
 src/main.rs | 8 +++++++-
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/src/inst.rs b/src/inst.rs
index fd30b48..cc038b1 100644
--- a/src/inst.rs
+++ b/src/inst.rs
@@ -2,6 +2,7 @@ use modular_bitfield::prelude::*;
 
 use crate::rv32;
 
+// Arithmetic logic
 #[bitfield]
 pub struct RType {
     opcode: B7,
@@ -12,6 +13,7 @@ pub struct RType {
     funct7: B7,
 }
 
+// Loads & immeiate arithmetic
 #[bitfield]
 pub struct IType {
     opcode: B7,
@@ -21,6 +23,7 @@ pub struct IType {
     imm: B12,
 }
 
+// Stores
 #[bitfield]
 pub struct SType {
     opcode: B7,
@@ -31,6 +34,7 @@ pub struct SType {
     imm_h: B7,
 }
 
+// Conditional jump
 #[bitfield]
 pub struct BType {
     opcode: B7,
@@ -43,6 +47,7 @@ pub struct BType {
     imm_12: B1,
 }
 
+// Upper immediate
 #[bitfield]
 pub struct UType {
     opcode: B7,
@@ -50,6 +55,8 @@ pub struct UType {
     imm: B20,
 }
 
+
+// Unconditional jump
 #[bitfield]
 pub struct JType {
     opcode: B7,
diff --git a/src/main.rs b/src/main.rs
index 0bf5848..7de64e2 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -70,10 +70,16 @@ impl VMRV32I {
 
     fn exec(&mut self) {
         while self.pc > self.bus.memory.len() as u32 {
+            // fetch
             let inst = self.fetch();
             println!("VM > Fetched 0x{:08x}: 0x{:08x}", self.pc, unsafe {inst.inst});
-
             self.pc = self.pc + rv32::WORD as u32;
+
+            //decode
+
+            // exec
+            
+
             self.x[0] = 0x00000000;
         }
     }