diff --git a/src/cpu/mod.rs b/src/cpu/mod.rs index 07ba121..0c23049 100644 --- a/src/cpu/mod.rs +++ b/src/cpu/mod.rs @@ -21,6 +21,7 @@ use std::{cell::RefCell, rc::Rc}; pub struct CPUState { pub x: [rv32::Word; 32], pub pc: rv32::Word, + pub trap: rv32::Word, } pub struct CPU { @@ -37,7 +38,11 @@ impl CPU { extensions: Vec, ) -> CPU { CPU { - state: CPUState { x: [0; 32], pc: 0 }, + state: CPUState { + x: [0; 32], + pc: 0, + trap: 0, + }, bus, instruction_decoder, extensions, diff --git a/src/ext/i/mod.rs b/src/ext/i/mod.rs index b589182..d9dff4f 100644 --- a/src/ext/i/mod.rs +++ b/src/ext/i/mod.rs @@ -89,9 +89,6 @@ impl Instruction for JALR { } fn match_inst(&self, inst: rv32::Word) -> bool { - // testing against print - println!("JALR: {:032b}", inst); - println!("JALR: xxxxxxxxxxxxxxxxx000xxxxx1100111"); match_mask!(inst, "xxxxxxxxxxxxxxxxx000xxxxx1100111") } @@ -105,6 +102,90 @@ impl Instruction for JALR { } } +#[derive(Default, Copy, Clone)] +pub struct BRANCH; // Thisis is the first time we write a catchall + // instruction, this will match BEQ, BNE, BLT, + // BGE, BLTU, BEGE +impl Instruction for BRANCH { + fn name(&self) -> &'static str { + "BEQ, BNE, BLT, BGE, BLTU, BGEU" + } + + fn match_inst(&self, inst: rv32::Word) -> bool { + match_mask!(inst, "xxxxxxxxxxxxxxxxxxxxxxxxx1100011") + } + + fn step(&self, inst: GenInstruction, state: &mut cpu::CPUState) { + println!("VM > Executing BEQ, BNE, BLT, BGE, BLTU, BGEU"); + let inst = unsafe { inst.B }; + let offset = state.pc + (inst.sext_imm() << 1) - 4; + match inst.funct3() { + 0b000 => { + if inst.rs1() == inst.rs2() { + state.pc = offset + } + } + 0b001 => { + if inst.rs1() != inst.rs2() { + state.pc = offset + } + } + 0b100 => { + if inst.rs1() < inst.rs2() { + state.pc = offset + } + } + 0b101 => { + if inst.rs1() >= inst.rs2() { + state.pc = offset + } + } + 0b110 => { + if (inst.rs1() as u32) < (inst.rs2() as u32) { + state.pc = offset + } + } + 0b111 => { + if (inst.rs1() as u32) >= (inst.rs2() as u32) { + state.pc = offset + } + } + _ => state.trap = 3, + } + } +} + +#[derive(Default, Copy, Clone)] +pub struct Load; + +impl Instruction for Load { + fn name(&self) -> &'static str { + "LOAD" + } + + fn match_inst(&self,inst:rv32::Word) -> bool { + match_mask!(inst, "xxxxxxxxxxxxxxxxxxxxxxxxx0000011") + } + + fn step(&self,inst:GenInstruction,state: &mut cpu::CPUState) { + + } +} + +#[derive(Default, Copy, Clone)] +pub struct Store; + +impl Instruction for Store { + fn name(&self) -> &'static str { + "STORE" + } + + fn match_inst(&self,inst:rv32::Word) -> bool { + match_mask!(inst, "xxxxxxxxxxxxxxxxxxxxxxxxx0100011") + } + +} + #[derive(Default, Copy, Clone)] pub struct ADDI; @@ -151,6 +232,9 @@ pub enum ExtensionI { AUIPC(AUIPC), JAL(JAL), JALR(JALR), + BRANCH(BRANCH), + LOAD(BRANCH), + STORE(STORE), ADDI(ADDI), ADD(ADD), } diff --git a/test/add.S b/test/add.S index 4e2462c..f1adf46 100644 --- a/test/add.S +++ b/test/add.S @@ -1,4 +1,4 @@ main: - addi x29, x0, 5 + addi x29, x0, 0 addi x30, x0, 37 add x31, x30, x29 diff --git a/test/add.bin b/test/add.bin index 07d354d..9db8c3f 100644 Binary files a/test/add.bin and b/test/add.bin differ diff --git a/test/test b/test/test index 7310d2a..8dfc0c9 100755 Binary files a/test/test and b/test/test differ diff --git a/test/test.S b/test/test.S index a6a6400..03dbef8 100644 --- a/test/test.S +++ b/test/test.S @@ -1,8 +1,6 @@ -lui x1, 0xFFFFF addi x2, x0, 0x123 -addi x2, x0, 0x123 -lui t1, 0x80000 # jalr main into x4 then jump to x4 -jalr t1, 0x4 +addi x3, x0, 0x123 +beq x2, x3, main -main: +mai: addi t0, x0, 100 diff --git a/test/test.bin b/test/test.bin index 60fd114..eb4e91d 100755 Binary files a/test/test.bin and b/test/test.bin differ diff --git a/test/test.hex b/test/test.hex index f3b58b8..cd521ea 100644 --- a/test/test.hex +++ b/test/test.hex @@ -1,3 +1,2 @@ -:10000000B7F0FFFF130130121301301237030080E5 -:08001000E700430093024006E3 +:100000001301301293013012630231009302400653 :00000001FF diff --git a/test/test.lst b/test/test.lst index 2983058..12a9fc6 100644 --- a/test/test.lst +++ b/test/test.lst @@ -4,12 +4,10 @@ test: file format elf64-littleriscv Disassembly of section .text: -0000000000000000 : - 0: fffff0b7 lui ra,0xfffff - 4: 12300113 addi sp,zero,291 - 8: 12300113 addi sp,zero,291 - c: 80000337 lui t1,0x80000 - 10: 004300e7 jalr ra,4(t1) # ffffffff80000004 <__global_pointer$+0xffffffff7fffe7ec> +0000000000000000 : + 0: 12300113 addi sp,zero,291 + 4: 12300193 addi gp,zero,291 + 8: 00310263 beq sp,gp,c
-0000000000000014
: - 14: 06400293 addi t0,zero,100 +000000000000000c
: + c: 06400293 addi t0,zero,100 diff --git a/test/test.map b/test/test.map index 741db51..fd063e6 100644 --- a/test/test.map +++ b/test/test.map @@ -4,15 +4,15 @@ test: file format elf64-littleriscv SYMBOL TABLE: 0000000000000000 l d .text 0000000000000000 .text 0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes -0000000000000000 l df *ABS* 0000000000000000 ccC2JIEu.o -0000000000000014 l .text 0000000000000000 main -0000000000001818 g *ABS* 0000000000000000 __global_pointer$ -0000000000001018 g .text 0000000000000000 __SDATA_BEGIN__ +0000000000000000 l df *ABS* 0000000000000000 ccI1S9sJ.o +000000000000000c l .text 0000000000000000 main +0000000000001810 g *ABS* 0000000000000000 __global_pointer$ +0000000000001010 g .text 0000000000000000 __SDATA_BEGIN__ 0000000000000000 *UND* 0000000000000000 _start -0000000000001018 g .text 0000000000000000 __BSS_END__ -0000000000001018 g .text 0000000000000000 __bss_start -0000000000001018 g .text 0000000000000000 __DATA_BEGIN__ -0000000000001018 g .text 0000000000000000 _edata -0000000000001018 g .text 0000000000000000 _end +0000000000001010 g .text 0000000000000000 __BSS_END__ +0000000000001010 g .text 0000000000000000 __bss_start +0000000000001010 g .text 0000000000000000 __DATA_BEGIN__ +0000000000001010 g .text 0000000000000000 _edata +0000000000001010 g .text 0000000000000000 _end