2022-05-29 13:09:46 +01:00
2022-05-29 13:09:46 +01:00
2022-05-26 23:54:01 +01:00
2022-05-26 23:54:01 +01:00
Description
A collection of multiple basic FPGA projects on various development boards
78 KiB
Languages
Verilog 70.1%
Tcl 17.9%
SystemVerilog 7.6%
Makefile 2.8%
C++ 1.6%