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fixed "all" implementation bugs, can now run C!

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This commit is contained in:
Benjamin Kyd
2023-07-20 21:52:36 +01:00
parent cadcb542d3
commit 6bf5ccf7c8
10 changed files with 103 additions and 112 deletions
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6
src/cpu/mod.rs
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@@ -57,8 +57,9 @@ impl CPU {
self.state.pc = DRAM_BASE as rv32::Word;
self.state.x[0] = 0x00000000; // x0 is tied to ground
self.state.x[2] = ram::DRAM_SIZE as u32; // x2 the addressable
self.state.x[2] = DRAM_BASE + ram::DRAM_SIZE as u32; // x2 the stack pointer
println!("VM > CPU Initialisd with extensions {:?}", self.extensions);
self.dump_reg();
}
pub fn get_pc(&self) -> rv32::Word {
@@ -76,11 +77,12 @@ impl CPU {
println!("VM > Fetched 0x{:08x}: 0x{:08x}", self.state.pc, inst);
self.state.x[0] = 0x00000000;
self.state.pc = self.state.pc + rv32::WORD as u32;
self.instruction_decoder
.borrow_mut()
.decode_exec_inst(inst, &mut self.state)?;
self.state.pc = self.state.pc + rv32::WORD as u32;
self.dump_reg();
}
Ok(())

32
src/ext/i/mod.rs
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@@ -74,7 +74,7 @@ impl Instruction for JAL {
let offset = sext(inst.full_imm() << 1, 32);
let pc = offset.wrapping_add(state.pc);
state.x[inst.rd() as usize] = state.pc + rv32::WORD as u32;
state.pc = pc - 4;
state.pc = pc.wrapping_sub(rv32::WORD as u32);
}
}
@@ -98,7 +98,7 @@ impl Instruction for JALR {
let offset = sext(inst.full_imm(), 32);
let pc = offset.wrapping_add(state.x[inst.rs1() as usize]);
state.x[inst.rd() as usize] = state.pc + rv32::WORD as u32;
state.pc = pc - 4;
state.pc = pc.wrapping_sub(rv32::WORD as u32);
}
}
@@ -272,12 +272,12 @@ impl Instruction for IMM {
let rs1 = state.x[inst.rs1() as usize];
match inst.funct3() {
0b000 => retval = rs1 + inst.sext_imm(), // addi
0b000 => retval = rs1.wrapping_add(inst.sext_imm()), // addi
0b010 => retval = ((rs1 as i32) < (inst.sext_imm() as i32)) as u32, // slti
0b011 => retval = ((rs1 as u32) < (inst.sext_imm() as u32)) as u32, // sltiu
0b100 => retval = rs1 ^ inst.sext_imm(), // xori
0b110 => retval = rs1 | inst.sext_imm(), // ori
0b111 => retval = rs1 & inst.sext_imm(), // andi
0b100 => retval = rs1 ^ inst.sext_imm(), // xori
0b110 => retval = rs1 | inst.sext_imm(), // ori
0b111 => retval = rs1 & inst.sext_imm(), // andi
_ => state.trap = 3,
}
@@ -309,14 +309,14 @@ impl Instruction for SHIFTI {
let inst = unsafe { inst.R }; // fun7 is the L/A selector
// rs2 is shamt
let mut retval = 0;
let shamt = inst.rs2();
let shamt = inst.rs2() as u32;
let rs1 = state.x[inst.rs1() as usize];
match inst.funct3() {
0b001 => retval = rs1 << shamt, //slli
0b001 => retval = rs1.wrapping_shl(shamt), //slli
0b101 => match inst.funct7() {
0b0000000 => retval = rs1 >> shamt, // srli
0b0100000 => retval = ((rs1 as i32) >> shamt) as u32, // srai
0b0000000 => retval = rs1.wrapping_shr(shamt), // srli
0b0100000 => retval = (rs1 as i32).wrapping_shr(shamt) as u32, // srai
_ => state.trap = 3,
},
_ => state.trap = 3,
@@ -348,17 +348,17 @@ impl Instruction for OP {
match inst.funct3() {
0b000 => match inst.funct7() {
0b0000000 => retval = rs1 + rs2, // add
0b0100000 => retval = rs1 - rs2, // sub
0b0000000 => retval = rs1.wrapping_add(rs2), // add
0b0100000 => retval = rs1.wrapping_sub(rs2), // sub
_ => state.trap = 3,
},
0b001 => retval = rs1 << (rs2 & 0x1F), // sll
0b001 => retval = rs1.wrapping_shl(rs2 & 0x1F), // sll
0b010 => retval = ((rs1 as i32) < (rs2 as i32)) as u32, // slt
0b011 => retval = ((rs1 as u32) < (rs2 as u32)) as u32, // sltu
0b100 => retval = rs1 ^ rs2, // xor
0b100 => retval = rs1 ^ rs2, // xor
0b101 => match inst.funct7() {
0b0000000 => retval = rs1 >> (rs2 & 0x1F), // srl
0b0100000 => retval = ((rs1 as i32) >> (rs2 & 0x1F)) as u32, // sra
0b0000000 => retval = rs1.wrapping_shr(rs2 & 0x1F), // srl
0b0100000 => retval = ((rs1 as i32).wrapping_shr(rs2 & 0x1F)) as u32, // sra
_ => state.trap = 3,
},
0b110 => retval = rs1 | rs2, // or

9
test/Makefile
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@@ -1,17 +1,22 @@
TARGET=c_test
GCC_PREFIX=riscv32-unknown-elf
CFLAGS:=-fno-stack-protector
CFLAGS+=-static-libgcc -fdata-sections -ffunction-sections
CFLAGS+=-g -O0 -march=rv32ia -mabi=ilp32 -static
LDFLAGS:= -T flatfile.lds -nostdlib
all: build
assemble:
$(GCC_PREFIX)-gcc -Wl,-Ttext=0x0 -nostdlib -march=rv64i -mabi=lp64 -o $(TARGET) $(TARGET).c
$(GCC_PREFIX)-gcc -o $(TARGET) $(TARGET).c $(CFLAGS) $(LDFLAGS)
$(GCC_PREFIX)-objdump -t $(TARGET) > $(TARGET).map
$(GCC_PREFIX)-objdump -d -M no-aliases $(TARGET) > $(TARGET).lst
$(GCC_PREFIX)-objcopy -O binary $(TARGET) $(TARGET).bin
$(GCC_PREFIX)-objcopy -O ihex $(TARGET) $(TARGET).hex
build:
$(GCC_PREFIX)-gcc -Wl,-Ttext=0x0 -nostdlib -march=rv64i -mabi=lp64 -o $(TARGET) $(TARGET).S
$(GCC_PREFIX)-gcc -o $(TARGET) $(TARGET).S $(CFLAGS) $(LDFLAGS)
$(GCC_PREFIX)-objdump -t $(TARGET) > $(TARGET).map
$(GCC_PREFIX)-objdump -d -M no-aliases $(TARGET) > $(TARGET).lst
$(GCC_PREFIX)-objcopy -O binary $(TARGET) $(TARGET).bin

BIN
test/c_test Normal file → Executable file
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BIN
test/c_test.bin Normal file → Executable file
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Binary file not shown.

22
test/c_test.c
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@@ -1,12 +1,12 @@
int fib(int n);
int main() {
return fib(10); // Calculate the 10th fibonacci number.
}
int fib(int n) {
if (n == 0 || n == 1)
return n;
else
return (fib(n - 1) + fib(n - 2));
__attribute__((section(".start"))) int main() {
volatile register int x = 0xD3AD;
volatile register int y = 0x1234;
volatile register int temp = y;
y = x;
x = temp;
if (x > y) {
x = 1;
} else {
y = 3;
}
}

22
test/c_test.hex
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@@ -1,14 +1,10 @@
:10000000130101FF23341100233081001304010187
:100010001305A000EF00C00193070500138507003A
:100020008330810003340100130101016780000067
:10003000130101FD2334110223308102233C91007E
:100040001304010393070500232EF4FC8327C4FD4A
:100050009B870700638A07008327C4FD1B8707006F
:10006000930710006316F7008327C4FD6F00000498
:100070008327C4FD9B87F7FF9B8707001385070035
:10008000EFF01FFB93070500938407008327C4FD4F
:100090009B87E7FF9B87070013850700EFF05FF959
:1000A00093070500BB87F4009B87070013850700B3
:1000B000833081020334010283348101130101037F
:0400C0006780000055
:0200000480007A
:10000000130101FE232E810013040102B7D7000063
:100010009387D73A2326F4FEB71700009387472328
:100020002324F4FE832784FE2322F4FE8327C4FEC8
:100030002324F4FE832744FE2326F4FE0327C4FE74
:10004000832784FE63D8E700930710002326F4FE7D
:100050006F00C000930730002324F4FE93070000D4
:10006000138507000324C10113010102678000000A
:040000058000000077
:00000001FF

83
test/c_test.lst
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@@ -1,58 +1,35 @@
c_test: file format elf64-littleriscv
c_test: file format elf32-littleriscv
Disassembly of section .text:
0000000000000000 <main>:
0: ff010113 addi sp,sp,-16
4: 00113423 sd ra,8(sp)
8: 00813023 sd s0,0(sp)
c: 01010413 addi s0,sp,16
10: 00a00513 addi a0,zero,10
14: 01c000ef jal ra,30 <fib>
18: 00050793 addi a5,a0,0
1c: 00078513 addi a0,a5,0
20: 00813083 ld ra,8(sp)
24: 00013403 ld s0,0(sp)
28: 01010113 addi sp,sp,16
2c: 00008067 jalr zero,0(ra)
0000000000000030 <fib>:
30: fd010113 addi sp,sp,-48
34: 02113423 sd ra,40(sp)
38: 02813023 sd s0,32(sp)
3c: 00913c23 sd s1,24(sp)
40: 03010413 addi s0,sp,48
44: 00050793 addi a5,a0,0
48: fcf42e23 sw a5,-36(s0)
4c: fdc42783 lw a5,-36(s0)
50: 0007879b addiw a5,a5,0
54: 00078a63 beq a5,zero,68 <fib+0x38>
58: fdc42783 lw a5,-36(s0)
5c: 0007871b addiw a4,a5,0
60: 00100793 addi a5,zero,1
64: 00f71663 bne a4,a5,70 <fib+0x40>
68: fdc42783 lw a5,-36(s0)
6c: 0400006f jal zero,ac <fib+0x7c>
70: fdc42783 lw a5,-36(s0)
74: fff7879b addiw a5,a5,-1
78: 0007879b addiw a5,a5,0
7c: 00078513 addi a0,a5,0
80: fb1ff0ef jal ra,30 <fib>
84: 00050793 addi a5,a0,0
88: 00078493 addi s1,a5,0
8c: fdc42783 lw a5,-36(s0)
90: ffe7879b addiw a5,a5,-2
94: 0007879b addiw a5,a5,0
98: 00078513 addi a0,a5,0
9c: f95ff0ef jal ra,30 <fib>
a0: 00050793 addi a5,a0,0
a4: 00f487bb addw a5,s1,a5
a8: 0007879b addiw a5,a5,0
ac: 00078513 addi a0,a5,0
b0: 02813083 ld ra,40(sp)
b4: 02013403 ld s0,32(sp)
b8: 01813483 ld s1,24(sp)
bc: 03010113 addi sp,sp,48
c0: 00008067 jalr zero,0(ra)
80000000 <main>:
80000000: fe010113 addi sp,sp,-32
80000004: 00812e23 sw s0,28(sp)
80000008: 02010413 addi s0,sp,32
8000000c: 0000d7b7 lui a5,0xd
80000010: 3ad78793 addi a5,a5,941 # d3ad <main-0x7fff2c53>
80000014: fef42623 sw a5,-20(s0)
80000018: 000017b7 lui a5,0x1
8000001c: 23478793 addi a5,a5,564 # 1234 <main-0x7fffedcc>
80000020: fef42423 sw a5,-24(s0)
80000024: fe842783 lw a5,-24(s0)
80000028: fef42223 sw a5,-28(s0)
8000002c: fec42783 lw a5,-20(s0)
80000030: fef42423 sw a5,-24(s0)
80000034: fe442783 lw a5,-28(s0)
80000038: fef42623 sw a5,-20(s0)
8000003c: fec42703 lw a4,-20(s0)
80000040: fe842783 lw a5,-24(s0)
80000044: 00e7d863 bge a5,a4,80000054 <main+0x54>
80000048: 00100793 addi a5,zero,1
8000004c: fef42623 sw a5,-20(s0)
80000050: 00c0006f jal zero,8000005c <main+0x5c>
80000054: 00300793 addi a5,zero,3
80000058: fef42423 sw a5,-24(s0)
8000005c: 00000793 addi a5,zero,0
80000060: 00078513 addi a0,a5,0
80000064: 01c12403 lw s0,28(sp)
80000068: 02010113 addi sp,sp,32
8000006c: 00008067 jalr zero,0(ra)

30
test/c_test.map
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@@ -1,20 +1,20 @@
c_test: file format elf64-littleriscv
c_test: file format elf32-littleriscv
SYMBOL TABLE:
0000000000000000 l d .text 0000000000000000 .text
0000000000000000 l d .comment 0000000000000000 .comment
0000000000000000 l d .riscv.attributes 0000000000000000 .riscv.attributes
0000000000000000 l df *ABS* 0000000000000000 c_test.c
00000000000018c4 g *ABS* 0000000000000000 __global_pointer$
00000000000010c4 g .text 0000000000000000 __SDATA_BEGIN__
0000000000000000 *UND* 0000000000000000 _start
00000000000010c8 g .text 0000000000000000 __BSS_END__
00000000000010c4 g .text 0000000000000000 __bss_start
0000000000000000 g F .text 0000000000000030 main
00000000000010c4 g .text 0000000000000000 __DATA_BEGIN__
00000000000010c4 g .text 0000000000000000 _edata
00000000000010c8 g .text 0000000000000000 _end
0000000000000030 g F .text 0000000000000094 fib
80000000 l d .text 00000000 .text
00000000 l d .debug_info 00000000 .debug_info
00000000 l d .debug_abbrev 00000000 .debug_abbrev
00000000 l d .debug_aranges 00000000 .debug_aranges
00000000 l d .debug_rnglists 00000000 .debug_rnglists
00000000 l d .debug_line 00000000 .debug_line
00000000 l d .debug_str 00000000 .debug_str
00000000 l d .debug_line_str 00000000 .debug_line_str
00000000 l d .comment 00000000 .comment
00000000 l d .riscv.attributes 00000000 .riscv.attributes
00000000 l d .debug_frame 00000000 .debug_frame
00000000 l df *ABS* 00000000 c_test.c
00000000 *UND* 00000000 _start
80000000 g F .text 00000070 main

11
test/flatfile.lds Normal file
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@@ -0,0 +1,11 @@
ENTRY(_start)
SECTIONS {
.text 0x80000000 : {
*(.start);
*(.text);
*(.text.*)
}
.bss : { *(.bss); *(.bss.*) }
.data : { *(.data); *(.data.*) }
.rodata : { *(.rodata); *(.rodata.*) }
}